The present invention relates to a semiconductor device of the type in which IC (integrated circuit) chips are mounted on a semiconductor substrate.
In one of the known printed circuit boards used for forming a logic system, gold interconnection wiring layers are printed on a ceramic substrate. This known printed circuit board involves many problems. For example, the manufacturing cost is high. The pitch of the interconnection wiring layers is several hundred microns, resulting in a considerably low density of the interconnection wiring layers. With such a large pitch of the interconnection wiring layers, the length of the interconnection wiring layers is correspondingly longer. This results in a large stray capacitance associated therewith and a limitation in the operation speed of the associated device.
To solve such problems, there has been an approach in which many IC chips with different functions are mounted on the substrate, while being interconnected by a wiring layer. Prior to this approach, many IC chips with the same functions were mounted on the substrate. The approach improves the density of the interconnection wiring layers and the operation speed of the device. However, with only one defective IC chip, the entire device must be treated as a bad one. This reduces the production yield. To cope with this problem, there has been proposed another appoach in which a sub-IC chip is used in addition to the regular IC chips, giving a redundancy in use to the device. When a defective IC chip is found, the sub-IC chip is used for replacement with the defective regular IC chip. Therefore, the production yield is improved. The additional use of the redundancy circuit, however, deteriorates the operating speed performance.